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ultra l ow noise microphone with bottom port and pdm digital output data sheet admp521 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2012 analog devices, inc. all rights reserved. features small and thin 4 mm 3 mm 1 mm surface - mount package omnidirectional response very h igh snr : 6 5 dba s ensitivity of ? 26 dbfs extended frequency response from 100 hz to 16 khz low current consumption : 900 a sleep mode for extended battery life , <1 a consumption 120 db maximum spl high ps r of ? 80 dbfs fourth - order - modulator digital pdm output compatible with sn/pb and pb - free solder processes rohs/weee compliant applications smartphones and feature phones tablet computers teleconferencing systems digital still and video cameras bluetooth h eadsets notebook pcs security and surveillance functional block dia gram admp521 ad c power management clk data v dd gnd pdm modulator channel select l/r select 10141-001 figure 1. b o tto m t o p 10141 - 011 figure 2 . isometric views of admp521 microphone package general description the admp521 1 is a high performance, ultra low noise , low power , digital output , bottom - ported omnidirectional mems microphone. the admp521 consists of a mems microphone element a n d an impedance converter amplifier followed by a fourth - order sigma - delta ( - ) modulator. the digital interface allows for the pulse density modulated ( pdm ) output of two microphone s to be time - multiplexed on a single data line using a single clock. the admp521 is function and pin compatible with the admp421 microp hone, providing an easy upgra de path. the admp521 has a very high signal - to - noise ratio ( snr ) and common sensitivity of ?26 dbfs , making it an excellent choice for far field applications. the admp521 has a n extended wide - band frequency response resulting in natural sound with high intelligibility. low current consumption an d a sleep mode with less than 1 a current consumption enable s long battery life for portable applications. the admp521 complies with the tia - 920 tel e - communications telephone terminal equipment transmission requirements for wideband digital wireline telephones standard . the admp521 is available in a thin 4 mm 3 mm 1 mm surface - mount package. it is reflow solder compatible with no sensitivity degradation. the admp521 is halide free. 1 protected by u.s. patents 7,449,356; 7,825,484; 7,885,423; 7,961,897. other patents are pending.
admp521 data sheet rev. a | page 2 of 16 table of contents fea tures .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general descri ption ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 timing characteristi cs ................................................................ 4 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 7 theory of operation ........................................................................ 8 pdm data format ........................................................................ 8 pdm microphone sensitivity ..................................................... 8 connecting pdm microphones ................................................. 9 sleep mode .....................................................................................9 start - up ..........................................................................................9 applications information .............................................................. 10 interfacing with analog devices codecs ................................ 10 supporting documents ............................................................. 10 pcb design and layout ................................................................. 11 alternative pcb land patterns ................................................. 12 pcb material and thickness .................................................... 12 handling instr uctions .................................................................... 13 pick - and - place equipment ....................................................... 13 reflow solder .............................................................................. 13 b oard wa sh ................................................................................. 13 reliability specifications ................................................................ 14 outline dimensions ....................................................................... 15 orderi ng guide .......................................................................... 15 revision hi story 4/12 rev. 0 to rev. a changes to general description section ...................................... 1 change d supply voltage min p arameter from 1.65 v to 1.8 v ... 3 changed 500 hours to 1000 hours in table 7 ............................ 14 2 / 1 2 revision 0 : initial versi on
data sheet admp521 rev. a | page 3 of 16 specifications t a = 25 c, v dd = 1.8 v , clk = 2.4 mhz, unless otherwise noted. all minimum and maximum specifications are guaranteed. typical specifications are not guaranteed. table 1 . parameter test conditions/comments min typ max unit performance directionality omni sensitivity 1 1 khz, 94 db sound pressure level ( spl ) ? 29 ? 26 ? 23 dbfs signal -to - noise ratio (snr) 20 hz to 20 khz , a - weighted 65 dba equivalent input noise (ein) 20 hz to 20 khz , a - weighted 29 dba spl dynamic range derived from ein and maximum acoustic input 91 db frequency response 2 low frequency ?3 db point 100 hz high frequency ?3 db point 16 khz deviation limits from flat response within pass band ? 3/+8 db total harmonic distortion (thd) 105 db spl 2.5 % power supply rejection (psr) 217 hz, 100 mv p - p sine wave superimposed o n v dd = 1.8 v ? 80 dbfs maximum acoustic input peak 120 db spl power supply supply voltage (v dd ) 1.8 3.3 v supply current (i s ) normal mode v dd = 1.8 v 0.9 1.0 ma v dd = 3.3 v 1.0 1.2 ma sleep mode 3 v dd = 1.8 v 0.5 a v dd = 3.3 v 0.8 a digital input/output characteristics input voltage high (v ih ) 0.65 v dd v input voltage low (v il ) 0.35 v dd v output voltage high (v oh ) i load = 0.5 ma 0.7 v dd v dd v output voltage low (v ol ) i load = 0.5 ma 0 0.3 v dd v out put dc offset percent of full scale 7 % latency <30 s noise floor 20 hz to 20 khz, a - weighted ? 91 dbfs 1 relative to the rms level of a sine w ave with positive amplitude equal to 100% 1s density and negative amplitude equal to 0% 1s density. 2 see figure 7 and figure 8 . 3 the microphone enters sleep mode when clock frequency is less than 1 khz.
admp521 data shee t rev. a | page 4 of 16 timing characteristi cs table 2 . parameter description min typ max unit sleep mode sleep time time from clk falling < 1 khz 1 ms wake - up time time from clk rising > 1 khz, power on 10 ms input t clkin input clock period 3 26 8 00 ns clock frequency (clk) 1.25 2.4 1 3.072 mhz clock duty ratio 40 60 % output t 1outen data1 (right) driven after falling clock edge 40 ns t 1outdis data1 (right) disabled after rising clock edge 5 30 ns t 2outen da ta2 (left) driven after rising clock edge 40 ns t 2outdis data2 (left) disabled after falling clock edge 5 30 ns 1 the microphone operate s at any clock frequency between 1.0 mhz and 3.3 mhz. some specifications may not be guaranteed at frequencies other than 2.4 mhz. timing diagram t clkin clk data2 data1 t 2outdis t 1outdis t 2outen t 1outen 10141-002 figure 3 . pulse density modulated output timing
data sheet admp521 rev. a | page 5 of 16 a bsolute m aximum r atings table 3 . parameter rating supply voltage ? 0.3 v to + 3.6 v digital pin input voltage ? 0.3 v to v dd + 0.3 v or + 3.6 v, whichever is less sound pressure level 160 db mechanical shock 1 0,000 g vibration per mil - std -883 m ethod 2007, test condition b temperature range ? 40c to + 85c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicate d in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution t p t l t 25c t o peak t s prehe a t critica l zone t l t o t p temper a ture time ramp-down ramp-u p t smin t smax t p t l 10141-003 figure 4. recommended soldering profile lim its table 4 . recommended soldering profile limits profile feature sn63/pb37 pb - free average ramp rate (t l to t p ) 1.25c/sec max imum 1.25c/sec maximum preheat minimum temperature (t smin ) 100c 100c maximum temperature (t sma x ) 150c 200c time (t smin to t smax ), t s 60 sec to 75 sec 60 sec to 75 sec ramp - up rate (t smax to t l ) 1.25c/sec 1.25c/sec time maintained above liquidous (t l ) 45 sec to 75 sec ~50 sec liquidous temperature (t l ) 183c 217c peak temperature (t p ) 215 c +3 c/?3c 260c + 0c/?5c time within 5c of actual peak temperature (t p ) 20 sec to 30 sec 20 sec to 30 sec ramp - down rate 3c/sec maximum 3c/sec maximum time 25c (t25c) to peak temperature 5 minute maximum 5 minute maximum
admp521 data shee t rev. a | page 6 of 16 pin configuration an d funct ion descriptions 3 clk l /r select gnd d ata v dd 4 5 2 1 10141-004 figure 5. pin configuration (bottom view) table 5 . pin function descriptions pin no. mnemonic description 1 clk clock input to microphone . 2 l/r select left channel or right channel se lect . data1 ( r ight ) : l/r select tied to gnd. data2 ( l eft ) : l/r select pulled to v dd . 3 gnd ground . 4 v dd power supply . placing a 0.1 f (100 nf) ceramic type x7r capacitor between pin 4 (v dd ) and ground is strongly recommended f or best performan ce and to avoid potential parasitic artifacts. place t he capacitor as close to pin 4 as possible. 5 data digital output signal (data1, data2) .
data sheet admp521 rev. a | page 7 of 16 typical performance characteristics ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 100 10k 1k frequency (hz) sensitivity (db) 10141-005 figure 6 . frequency response mask ?20 ?18 ?16 ?14 ?12 ?10 ?8 ?6 ?4 ?2 0 2 4 6 8 10 100 1k 10k frequenc y response (db) frequenc y (hz) 10141-006 figure 7 . typical frequency response (measured) ?100 ?90 ?80 ?70 ?60 ?50 ?40 200 500 1k 2k frequency (hz) psr (dbfs) 5k 10k 20k 10141-007 figure 8 . typical ps r vs. frequency
admp521 data shee t rev. a | page 8 of 16 theory o f operation pdm data format the output from the data pin of the admp521 is in pdm format. this data is the 1 - bit output of a fourth - order - modulator. the data is encoded so that the left channel is clocked on the falling edge of clk and the right channel is clocked on the rising edge of clk. after driving the data signal high or low in the appropriate half frame of the clk signal, the data driver of the microphone tristate s . in this way, two microphones, one set to the left channel and the other to right, can drive a single data line. see fi gure 3 for a timing diagram of the pdm d ata format; the data1 and data2 lines shown in this figure are two halves of the single physical data signal. figure 10 shows a diagram of the two stereo channels sharing a common data lin e. if only one microphone is connected to the data signal, the output is only clocked on a single edge ( see figure 9 ) . for example, a left channel microphone is never clocked on the rising edge of clk . in a single microphone app lication, each bit of the data signal is typically held for the full clk period until the next transition because the leakage of the data line is not enough to discharge the line while the driver is tristated. see table 6 for the channel assignments according to the logic level on the l/r select pin . table 6 . admp521 channel setting l/r select s etting channel low (tie to ground) data1 (right) high (tie to v dd ) data2 (left) for pdm data, the density of th e pulses indicates the signal amplitude. a high density of high pulses indica tes a signal near positive full scale and a high density of low pulses indicates a signal near negative full scale. a perfect zero (dc) audio signal show s an alternating pattern o f high and low pulses. the output pdm data signal has a small dc offset of between 3 % to 7% of full scale. this dc signal is typically removed by a high - pass filter in the codec that is connected to the digital microphone. da ta 1 ( r ) da ta 1 ( r ) da ta 1 ( r ) c l k da ta 10141-012 figure 9 . mono pdm format data2 (l) data2 (l) data1 (r) data1 (r) clk data 10141-013 figure 10 . stereo pdm format pdm microphone sensi tivity the acoustic input levels of the microphone in db spl are rms measurements ; however, the sensitivity and output level of a digital micr ophone is give n as a peak level. this is because its output is referenced to the full - scale digital word, which is a peak value. this convention is different from the output levels of analog microphones, which are given as an rms voltage. the admp521 has a sensitivity of ? 26 dbfs. a 94 db spl (rms) input signal give s a ? 26 dbfs peak output level ; therefore, the rms l evel of this digital output is ? 29 dbfs. this convention of using peak levels to specify the output of digital microphones must be kept in mind when configurin g downstream signal processing that may rely on precise signal levels. for example, dynamic range processors (compressors, limiters, noise gates) typically set thresholds based on rms signal levels ; therefore, adjust the signals of the microphone from peak to rms by lowering the dbfs value by 3 db.
data sheet admp521 rev. a | page 9 of 16 connecting pdm micro phones a pdm output microphone is typically connected to a codec with a dedicated pdm input. this codec separately decode s the left and right channels and filter s the high sampl e rate modulated data back to the audio frequency band. this codec also generate s the clock for the pdm microphones or is synchronous with the source that is generating the clock. see the applications information section for addi tional details on connecting the admp521 to analog devices , inc., audio codecs with a pdm input. figure 11 and figure 12 show mono and stereo connections o f the admp521 and a codec. the mono connection shows an admp521 set to output data on the right channel. to output on the left channel, tie the l/r select pin to v dd instead of gnd. clock output codec 0.1f 1.8v to 3.3v gnd l/r select data admp521 clk v dd data input 10141-014 figure 11 . mono pdm microphone (right channel) connection to codec clock output codec 0.1f 1.8v to 3.3v gnd l/r select data admp521 clk v dd data input 0.1f 1.8v to 3.3v gnd l/r select data admp521 clk v dd 10141-015 figure 12 . stereo pdm microphone connection to codec decouple t he v dd pin of the admp521 to gnd with a 0.1 f capacitor. place t his capacitor as close to v dd as the printed circuit board (pcb) layout allows. do not u se a pull - up or pull - down resistor on the pdm data signal line because it c an pull the signal to an incorr ect state during the period that the signal line is tristated. the data signal does not need to be buffered in normal use when the admp521 microphone(s) is placed close to the codec on the pcb . if the admp521 needs to drive the data signal over a long cable (>15 cm) or other large capacitive load, a digital buffer may be needed. only use a signal buffer on the data line when one microphone is in use or after the p oint where two microphones have been connected ( see figure 13) . the data output of each microphone in a stereo configuration cannot be individually buffered because the two buffer outputs cannot drive a single signal line. if a bu ffer is used, take care to select one with low propagation delay so that the timing of the data connected to the codec is not corrupted. when long wires are used to connect the codec to the admp521 , a 100 s ource termination resistor may be used on the clock output of the codec instead of a buffer to mini mize signal over - shoot or ringing . depending on the drive capability of the codec clock output, a buffer may still be needed, as shown in figure 13. clock output codec data admp521 admp521 clk data input data clk 10141-016 figure 13 . buffered connection between stereo admp521 s and a c odec sleep mode the microphone enters sleep mode when the clock frequency falls below 1 khz. in this mo de , the microphone data output is in a high impedance state. the current consumption in sleep mode is less than 1 a. the admp521 enters sleep mode within 1 ms of the clock frequency falling below 1 khz. the mi crophone wakes up from sleep mode in 32,768 cycles after the clock becomes active. with a 3.072 mhz clock, the microphone wake time is 10.7 ms; for a 2.4 mhz clock, the microphone wake time is 13.7 ms. start - u p the start - up time of the admp521 from when the clock is active is the same time as the waking from sleep time. the microphone starts up 32,768 cycles after the clock is active.
admp521 data shee t rev. a | page 10 of 16 applications informa tion interfacing w ith analog devices c odecs the pdm ou tput of the admp521 interfaces directly with the digital microphone inputs on analog devices adau1361 , adau1761 , an d adau1781 codecs. see the connection diagram shown in figure 14 , and refer to the an - 1003 application note and the respective data sh eets of the codecs for more details on the digital microphone interface. the cn - 0078 circuit n ote describes the connection between these codecs and a digital microphone. all configuration information is the sa me for the admp521 as it is for the admp421 . supporting documents for additional information, see the following . evaluation board user guides ug - 326 , eval - admp521z - flex: bottom - ported , digital output , mems microphone evaluation board ug - 335, e val - admp521z bottom port digital output mems microphone evaluation board circuit note cn - 0078, digital mems microphone simple interface to a sigmadsp audio codec application notes an - 1003, recommendations for mounting and connecting analog devices, inc., bo ttom - ported mems microphones an - 1068, reflow soldering of the mems microphone an - 1112, microphone specifications explained an - 1124, recommendations for sealing analog devices, inc., bottom - port mems microphones from dust and liquid ingress an - 1140, microphone array beamforming avdd agnd dgnd micbias adau1361 or adau1761 0.1f 0 . 1 f 1.8v to 3.3v jackdet/micin gnd l/r select data v dd clk admp521 admp521 gnd l/r select data v dd clk bclk/gpio2 10141-008 figure 14 . adau1361 or adau1761 stereo interface block diagram
data sheet admp521 rev. a | page 11 of 16 pcb design and layout the recommended pcb land pattern for the admp521 should be laid out to a 1:1 ratio to the solder pads on the microphone package, as shown in figure 15. take care to avoid applying solder paste to the sound hole in the pcb. a suggested solder paste stencil pattern layout is shown in figure 16. the response of the admp521 is not affected by the pcb hole size as long as the hole is not smaller than the sound port of the microphone (0.25 mm, or 0.010, in diameter). a 0.5 mm to 1 mm (0.020 inch to 0.040 inch) diameter for the hole is recommended. take care to align the hole in the microphone package with the hole in the pcb. the exact degree of the alignment does not affect the microphone performance as long as the holes are not partially or completely blocked. 4 0.40 0.60 (0.30) 0.90 (0.30) ?1.70 3.80 (0.30) 0.35 2.80 2 r0.10 (0.30) 0.35 2.05 0.70 ?1.10 10141-009 (1.000) (0.550) center line figure 15. suggested pcb land pattern layout 10141-010 1.45 0.9 2.45 0.7 1.525 1.000 0.35 1.849 1.849 1.498 0.205 wide 0.248 0.498 (2) 0.248 1.148 (2) 0.248 0.948 (2) 1.498 0.248 0.398 0.298 (4) 0.362 cut (3) 1.17 24 24 0.375 cente r line figure 16. suggested solder paste stencil pattern layout
admp521 data shee t rev. a | page 12 of 16 alternat ive pcb land patterns the standard pcb land pattern of the admp521 has a solid ring around the edge of the footprint that may make routing the microphone signals more difficult in some board designs. this ring is used to improve the rf immunity performance of the admp521 ; however, it is not necessary to have this full ring connected for electrical functionality. if a design can tolerate reduced rf immunity , this ring can either be broken or removed completely from the pcb footprint. figure 17 shows an example pcb land pattern with no enclosing ring around the edge of the part, and figure 18 shows an example pcb land pattern with the ring b roken on two sides so that the inner pads can be more easily routed on the pcb. 10141-017 figure 17 . example pcb land pattern with no enclosing ring 10141-018 figure 18 . example pcb land pattern with broken enclosing ring note that in both of these patterns, the solid ring around the sound port is still present; this ring is needed to ground the microphone and for acoustic performance. the pad on the package connected to this ring is ground and still needs a solid electrica l connection to the pcb ground. if a pattern like one of these two examples is used on a pcb, take care that the unconnected ring on the bottom of the admp521 is not placed directly over any exposed copper. th is ring on the microphone is still at ground and any pcb traces routed underneath it need to be properly masked to avoid short circuits. pcb material and thi ckness the performance of the admp521 is not affecte d by pcb thickness and can be mounted on both a rigid and flex ible pcb. a flexible pcb with the microphone can be attached directly to the device housing with an adhesive layer. this mounting method offers a reliable seal around the sound port, while provi ding the shortest acoustic path for good sound quality .
data sheet admp521 rev. a | page 13 of 16 handling instruction s pick - and - place equipment the mems microphone can be handled using standard pick - and - place and chip shooting equipment. take c are to avoid damage to the mems microphone structu re as follows: ? use a standard pickup tool to handle the microphone. because the microphone hole is on the bottom of the package, the pickup tool can make contact with any part of the lid surface. ? use care during pick - and - place to ensure t hat no high shock events above 1 0 k g are experienced because such events may cause damage to the microphone. ? do not pick up the microphone with a vacuum tool that makes contact with the bottom side of the microphone. do not pull air out of or blow air into the microphone port. ? do not use excessive force to place the microphone on the pcb . reflow solder for best results, the soldering profile should be in accordance with the recommendations of the manufacturer of the solder paste used to a ttach the mems microphone to the pcb . it is recommended that the solder reflow profile not exceed the limit conditions specified in figure 4 and table 4 . board wash when washing the pcb, ensure that wat er does not make contact with the microphone port. do not use b low - off procedures and ultrasonic cleaning.
admp521 data sheet rev. a | page 14 of 16 reliability specific ations the microphone sensitivity after stress must deviate by no more than 3 db from the initial value. table 7 . stress test description low temperature operating life ? 40c, 1000 h ou rs, powered high temperature operating life +125c, 1000 h ou rs, powered temperature humidity bias ( thb ) + 8 5c/85% relative humidity (rh), 1000 h ou rs, powered temperature cycle ? 40c /+125c, one cycle per hour, 1 0 00 cycles high temperature storage 150c, 1000 h ou rs low temperature storage ? 40c, 1000 h ou rs
data sheet admp521 rev. a | page 15 of 16 outline dimensions 04-19-2012-g 1.50 2.80 bot t om view top view side view reference corner 4.10 4.00 3.90 3.10 3.00 2.90 1 2 3 4 5 0.90 2.48 ref 0.72 ref 3.54 ref 1.05 ref 2.05 3.80 0.70 0.30 ref 0.25 dia. (thru hole) 1.10 dia. r 0.10 (2 ) 1.70 dia. 0.95 ref 0.35 0.35 0.30 ref 0.30 ref 1.10 1.00 0.90 0.24 ref 0.40 0.60 (pins 1, 2, 4, 5) 0.30 ref pin 1 figure 19 . 5- terminal chip array small outline no lead cavity [lga_ cav] 4 mm 3 mm body (ce - 5- 1) dimensions shown in millimeters ordering guide model 1 temperature range package description package option 2 ordering quantity admp521 acez - rl ? 40c to + 85c 5 - terminal lga_cav , 13 tape and reel ce -5 -1 5 ,000 admp521 acez - rl 7 ? 40c to + 85 c 5 - terminal lga_cav, 7 tape and reel ce - 5 - 1 1,000 eval - admp521z evaluation board eva l - admp521 z - flex flex ible evaluation board 1 z = rohs compliant part. 2 this package option is halide free .
admp521 data sheet rev. a | page 16 of 16 notes ? 2012 analog devices, inc. all rights reserved. trademarks an d registered trademarks are the property of their respective owners. d10141 - 0- 4/12(a)

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